Logic Synthesis and Verification Algorithms is popular PDF and ePub book, written by Gary D. Hachtel in 2005-12-17, it is a fantastic choice for those who relish reading online the Technology & Engineering genre. Let's immerse ourselves in this engaging Technology & Engineering book by exploring the summary and details provided below. Remember, Logic Synthesis and Verification Algorithms can be Read Online from any device for your convenience.
Logic Synthesis and Verification Algorithms Book PDF Summary
Logic Synthesis and Verification Algorithms is a textbook designed for courses on VLSI Logic Synthesis and Verification, Design Automation, CAD and advanced level discrete mathematics. It also serves as a basic reference work in design automation for both professionals and students. Logic Synthesis and Verification Algorithms is about the theoretical underpinnings of VLSI (Very Large Scale Integrated Circuits). It combines and integrates modern developments in logic synthesis and formal verification with the more traditional matter of Switching and Finite Automata Theory. The book also provides background material on Boolean algebra and discrete mathematics. A unique feature of this text is the large collection of solved problems. Throughout the text the algorithms covered are the subject of one or more problems based on the use of available synthesis programs.
Detail Book of Logic Synthesis and Verification Algorithms PDF
- Author : Gary D. Hachtel
- Release : 17 December 2005
- Publisher : Springer Science & Business Media
- ISBN : 9780306475924
- Genre : Technology & Engineering
- Total Page : 579 pages
- Language : English
- PDF File Size : 21,8 Mb
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